The present invention relates to phase-locked loop circuitry, and more specifically to a fast CMOS charge pump circuit.
Phase-locked loop (PLL) circuits are widely used in electronic systems for clock recovery, frequency synthesis, and many other applications. PLL circuits are discussed in the following references:
1. "Phaselock Techniques", by Floyd M. Gardner, John Wiley & Sons, 1979.
2. "Phase-locked Loops -- Theory, Design, and Applications", by Dr. Roland E. Best, McGraw-Hill, 1984.
These references are hereby incorporated by reference.
There are many applications for PLL circuits in high-performance computer systems. For example, a phaselocked loop may be used as a frequency multiplier to double the on-chip clock frequency. A phase detector detects any phase difference between an input signal and the output signal of a voltage-controlled oscillator (VCO) and generates control signals to minimize the phase difference.
A PLL circuit may also employ a charge pump circuit which responds to control signals from the phase detector to modulate the amount of charge stored in a loop filter between the charge pump circuit and the VCO. The output voltage of the loop filter controls the VCO frequency.
It is important to match the charge and discharge currents in the charge pump circuit. A mismatch in the two currents results in static phase error between the input signal and the output signal of the VCO. This static phase error can be a serious problem in many systems. For example, the bit error rate in the read channel of a disk sub-system may be strongly affected by the static phase error. This mismatch can only be minimized by minimizing the mismatch between the charge and discharge currents from the charge pump circuit.
Unfortunately, conventional charge pump circuits suffer from large overshoots in current at the beginning of the charge and discharge cycles and a large undershoot in current at the end of the charge and discharge cycles. For lower-frequency systems, the overshoots and undershoots are not a significant problem because they represent a small part of the total charge and discharge cycles.
However, in higher-frequency high-performance systems having very short charge and discharge cycles, the undershoots and overshoots represent a significant part of the charge and discharge cycles. The overshoots and undershoots cause difficulty in matching the charge and discharge currents and cause high-frequency noise in the output of the charge pump circuit. This high-frequency noise is difficult to filter by the loop filter. Consequently, noise is injected into the VCO, resulting in phase jitter at the output of the VCO.
Therefore, it would be desirable to produce a charge pump circuit which does not produce the overshoots and undershoots of traditional charge pump circuits.